SI9961 vishay siliconix faxback 408-970-5600, request 70014 s-60752rev. f, 05-apr-99 www.siliconix.com 1 12-v voice coil motor driver features description the SI9961 is a linear actuator (voice coil motor) driver suitable for use in disk drive head positioning systems. the SI9961 contains all of the power and control circuitry necessary to drive the vcm that is typically found in 3?-inch hard disk drives and optical disk drives. the driver is capable of delivering 1.8 a at a nominal supply of 12 v. the SI9961 provides all necessary functions including a motor current sense amplifier, a loop compensation amplifier and a power amplifier featuring four complementary mosfets in a h-bridge configuration. the output crossover protection ensures no cross-conducting current and true class b operation during linear tracking. externally programmable gain switch at the input summing junction increases the resolution and dynamic range for a given dac. the head retract circuitry can be activated by either an undervoltage condition or an external command. an external resistor is required to set the vcm current during retract. the SI9961 is constructed on a self-isolated bic/dmos power ic process. the ic is available in 24-pin so package for operation over the commercial, c suffix (0 to 70 c) temperature range. functional block diagram ? 1.8-a h-bridge output ? class b linear operation ? externally programmable gain and bandwidth ? undervoltage head retract ? programmable retract current ? low standby current ? rail-to-rail output swing ? single 12-v supply ? system voltage monitor with fault output SI9961 data storage
SI9961 vishay siliconix s-60752rev. f, 05-apr-99 faxback 408-970-5600, request 70014 2 www.siliconix.com absolute maximum ratings voltages referenced to common pin v+ supply range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 v to 16 v pin (fault ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 v to v cc + 0.3 v pin (output a & b, source a & b) . . . . . . . . . . . -0.3 v to v dd + 0.3 v pin (all others) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 v to v+ + 0.3 v maximum clamp current output a, output b (pulsed 10 ms at 10% duty cycle) . . . . . . . 1.8 a pin (all others) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 ma storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150 c operating temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to 70 c junction temperature (t j ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 c power dissipation (package) a 24-pin soic b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.125 w thermal impedance ( q ja ) a 24-pin soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 c/w notes a. device mounted with all leads soldered or welded to pc board. b. derate 25 mw/ c above 25 c. specifications parameter symbol test conditions unless otherwise specified v+ = 12 v 10%, v dd = 11.6 v 10% v cc = 5 v 10%, v ref- = gnd = 0 v v ref = 5 v 5% limits c suffix 0 to 70 c unit min a typ b max a bridge outputs (a 4 , a 5 ) high level output voltage v oh i oh = 1.0 a, v dd = 10.2 v, oa 2 = v ref 1 v 8.0 9.1 v low level output voltage v ol i ol = -1.0 a, oa 2 = v ref 1 v 0.6 1.1 clamp diode voltage v cl i f = 1.0 a, enable = high 2.5 amplifier gain output v range = v ref 2 v 121618v/v dynamic crossover current measured at v dd 10 ma slew rate sr 1 v/ m s small signal bandwidth (-3 db) 0.2 mhz input deadband -60 60 mv a 2 , loop compensation amplifier input offset voltage v os -8 8 mv input bias current i b gain select = high, ia 2 - = 5 v -50 50 na unity gain bandwidth r load = 10 k w , c load = 100 pf to v ref 1mhz slew rate sr 1 v/ m s power supply rejection ratio psrr @ 10 khz 50 db open loop voltage gain a vol 80 output voltage swing v o r load = 10 k w to v ref v ref - 2 v ref + 2 v a 3 , current sense amplifier input offset voltage v os -5 5 mv input impedance r in i sense in+ to i sense in- 5 k w small signal bandwidth (-3 db) r load = 10 k w , c load = 100 pf to v ref 1mhz common mode rejection ratio cmrr @ 5 khz 50 db slew rate sr 2 v/ m s gain 3.944.1v/v input common-mode voltage range v cm to gnd -0.3 2 v output voltage swing v o r load = 10 k w , c load = 100 pf to v ref v ref - 2 v ref + 2
SI9961 vishay siliconix faxback 408-970-5600, request 70014 s-60752rev. f, 05-apr-99 www.siliconix.com 3 supply supply current (normal) i cc static, no load retract = high enable = low 0.01 ma i v+ 25 i dd 513 supply current (standby) i cc static, no load retract = high enable = high 0.01 i v+ 0.2 0.4 i dd 0.8 1.6 v dd range v dd normal mode 10.2 11.6 13.2 v retract mode 2.0 14 v cc range v cc 4.555.5 v+ range v+ 10.8 12 13.2 gain select switch r fb switch resistance ia2- = 5 v 108 240 w r inh switch resistance 135 300 r inl switch resistance 810 1800 v ref (ext) input current i ref oa2 = v ref 0.15 0.40 0.65 ma external voltage range v ref 4.75 5 5.25 v power supply monitor v cc undervoltage threshold v ref = 5.0 v 3.82 4.12 4.42 v hysteresis 40 mv v+ undervoltage threshold v ref = 5.0 v 9.1 9.8 10.6 v hysteresis 100 mv gain select, retract , enable input input high voltage v ih 3.5 v input low voltage v il 1.5 input high current i ih v in = 5 v -1 1 m a input low current i il v in = 0 v -1 1 fault output output high voltage v oh i oh = -100 m av cc -0.8 v cc -0.33 v output low voltage v ol i ol = 1.6 ma 0.25 0.50 output high sourcing current i ohs v out = 0 v 400 1100 m a specifications parameter symbol test conditions unless otherwise specified v+ = 12 v 10%, v dd = 11.6 v 10% v cc = 5 v 10%, v ref- = gnd = 0 v v ref = 5 v 5% limits c suffix 0 to 70 c unit min a typ b max a
SI9961 vishay siliconix s-60752rev. f, 05-apr-99 faxback 408-970-5600, request 70014 4 www.siliconix.com notes a. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. typical values are for design aid only, not guaranteed nor subject to production testing. pin configurations retract current control (retract = low, output current from a to b) i ret bias voltage v(i ret )v dd = 10 v, r ret = 3.74 k w 0.66 v retract output pull-up voltage v out a v dd = 2.5 v to 14 v, i outa = 30 ma v dd -1 retract output pull-down current i outb v dd = 10 v, v outb = 5 v r ret = 3.74 k w r sb = 0.5 w , t a = 25 c 22 30 38 ma maximum emergency retract current i outb (max) v dd = 2 v, v outb = 0.7 v r ret = < 10 w r sb = 0.5 w , 40 retract current v dd supply rejection ratio v dd = 2 v to 14 v, r ret = 3.74 k w 3.0 %/v retract current temperature coefficient v dd = 10 v, r ret = 3.74 k w -0.3 %/ c specifications parameter symbol test conditions unless otherwise specified v+ = 12 v 10%, v dd = 11.6 v 10% v cc = 5 v 10%, v ref- = gnd = 0 v v ref = 5 v 5% limits c suffix 0 to 70 c unit min a typ b max a
SI9961 vishay siliconix faxback 408-970-5600, request 70014 s-60752rev. f, 05-apr-99 www.siliconix.com 5 applications introduction the SI9961 voice coil motor (vcm) driver integrates the active feedback and drive components of a head-positioning servo loop for high-performance hard-disk applications. the SI9961 operates from a 12-v (10%) power supply and delivers 1 a of steady-state output current. this device is made possible by a power ic process which combines bipolar, cmos and complimentary dmos technologies. cmos logic and linear components minimize power consumption, bipolar front-ends on critical amplifiers provide necessary accuracy, and complimentary (p- and n-channel) dmos devices allow the transconductance output amplifier to operate from ground to v dd . two user-programmable, current feedback/input voltage ratios may be digitally selected to optimize gain for both seek and track following modes, to maximize system accuracy for a given dac resolution. an undervoltage lockout circuit monitors the v+ supply and generates a fault signal to trigger an orderly head-retract sequence at a voltage level sufficient to allow the spindle motors back emf-generated voltage to supply the necessary head parking energy. head retract can also be commanded via a separate retract input. vcm current during retract can be user programmed with a single external resistor. external components are limited to r/c filter components for loop compensation and the resistors that are required to program gain, retract current, and the load current sense. figure 1. SI9961 typical application
SI9961 vishay siliconix s-60752rev. f, 05-apr-99 faxback 408-970-5600, request 70014 6 www.siliconix.com user-programmable gains during linear operation, the transconductance amplifiers gains (input voltage at v in vs. vcm current, in figure 1) are set by external resistors r 3 ? r 5 , r sa , and r sb and selected by gain input. after selecting a value for r sa and r sb that will yield the desired vcm current level, the high and low feedback gain ratios may be determined by the following: where r s = r sa = r sb input offset current may then be calculated as: where r in = r 3 or r 4 head retract a low on the retract input pin turns output devices q1 and q4 on, and output devices q2 and q3 off. maximum vcm current can be set during head retract by adding an external resistor between the iret pin and ground. maximum retract current may be calculated as: head retract can be initiated automatically by an undervoltage condition (either the 12-v or 5-v supplies on the SI9961) by connecting the fault output to the retract input. a high enable input puts both driver outputs in a high- impedance state. the enable function can be used to eliminate quiescent output current when power is applied but the head has been parked, such as a sleep mode. a sleep- mode power down sequence should be preceded by a retract signal since a power failure during this state may not provide adequate spindle-motor back emf to permit head retraction. transconductance amplifier compensation the SI9961cy features an integrated transconductance amplifier to drive the voice coil motor (vcm). to ensure proper operation, this amplifier must be compensated specifically for the vcm being driven. as a first approximation, the torque constant and inertia of the vcm may be ignored, although they will have some influence on the final results, especially if large values are involved (figure 1). frequency compensation the vcm transconductance (in siemens) of this simplified case may be expressed in the s (laplace) plane as: where r v = vcm resistance in ohms l v = vcm inductance in henrys s is the laplace operator in this case, the transconductance pole is at -rv/lv. it is desirable to cancel this pole in the interest of stability. to do this, a compensation amplifier is cascaded with the vcm and its driver. the transfer function of this amplifier is: where r l = compensation amplifier feedback resistor in ohms c l = compensation amplifier feedback capacitor in farads a = compensation amplifier and driver voltage gain at high frequency if r l x c l is set equal to l v /r v , then the combined open loop transconductance in siemens becomes: in this case, the transconductance has a single pole at the origin. if this open loop transfer is closed with a transimpedance amplifier having a gain of b ohms, the resultant closed loop transconducatance stage has the transfer function (in siemens) of: where b = current feedback transimpedence amplifier gain in ohms. the entire transconductance now contains only a single pole at -a ? b/lv. a and b are chosen to be considerably higher than the servo bandwidth, to avoid undue phase margin reduction. as a typical example, in the referenced schematic, assume that rsa and rsb = 0.5 w , r 5 = r 3 = 10 k w , vcm inductance (lv) = 1.5 mh, vcm resistance (rv) = 15 w . hence: r v = 15 w l v = 1.5 mh b = 2 w a = 16 x r l /10000 c l = l v /(r v x r l ) = 100 x 10 -6 /r l farads gain optimization there are three things to consider when optimizing the gain (a) above. the first is servo bandwidth. the main criterion here is to avoid having the transconductance amplifier cause an undue loss of phase margin in the overall servo (mechanical + electrical + firmware) loop. the second is to avoid confirguing a bandwidth that is more than required in view of noise and stability considerations. the third is to keep the voltage output waveform overshoot to a level that will not cause cross-conduction of the output fets. high gain r 5 r 3 ------ - ? ?? 1 4 r s ------------ - = gain select input=high () low gain r 5 r 4 ------ - ? ?? 1 4 r s ------------- = gain select input=low () i os 1 4 r s ------------ - = r s r in + () r in --------------------------- - ? ?? v osa2 5 v ias3 + ? ?? i out 175 i ret 175 0.66v r ret --------------- - == g v 1 l v ----- ? ?? s r v l v ------ + ? ?? ? = h c a s 1 r l c l ------------------- - + ? ?? s ----------------------------------- = g tc a sl v + -------------- - = g to a l v ----- s ab l v ------------- - + ----------------------- =
SI9961 vishay siliconix faxback 408-970-5600, request 70014 s-60752rev. f, 05-apr-99 www.siliconix.com 7 the first two problems can be considered together. let us assume a disk drive with a spindle rpm of 4400 and with 50 servo sectors per track. the sample rate is therefore: as a rule of thumb, the open loop unity gain crossover frequency of the entire servo (mechanical + electrical + firmware) loop should be less than 1/10 of the sample frequency. in this example, the servo open loop unity gain crossover frequency would be less than 367 hz. if we allow only a 10 degradation in phase margin due to the transconductance amplifier, then a phase lag of 10 at 367 hz is acceptable. this results in a 3-db point in the transconductance at: or a 3-db point in the transconductance at 2081 hz. the pole in the closed loop transconductance (-a ? b / lv) should then be 2081 ? 2 ? p = 13075. this means that a = 9.8. from the above equation for a, r = 6.2 k w . this sets the minimum gain limit governed by the servo bandwidth requirements. the gain should not be much greater than this, since increased noise will degrade the servo response. the third problem, keeping the transconductance amplifier voltage output wave form overshoot to a level that will not cause the wrong output fets to conduct, can be evaluated by deriving the voltage transfer function of the closed loop transconductance amplifier from input voltage to output voltage (vin to output a and b on the reference schematic). this is: where p = 1/r l x c l ) or r v /l v comp amplifier zero/vcm pole x = a x b/l v closed loop pole if a unit step voltage is applied to the above transfer function and the inverse laplace transform is taken, the output result is: where t = time as we can see, if x = p (i.e. if the vcm pole and compensation amplifier zero = the transconductance closed loop pole), then vo reduces to a. in other words, a step input results in a step output without overshoot. if x < p then a step input results in an increased rise time output and no overshoot. if x > p, a step input results in a step output with an overshoot. if this overshoot is large enough, there may be a cross- conduction condition in the output fets. let us look at the above equation at t = 0 and t >> 0, expressed in terms of the open loop high frequency voltage gain, a. in the example shown above, p = 10,000 and a = 9.8. this means that there is some overshoot. at t = 0, the output voltage is 9.8 v per volt of input. at some later time, it has dropped to 7.5 v per volt of input. an overshoot of 31 % is thus produced. the maximum overshoot voltage requires careful consideration, since it constitutes a potentially catastrophic problem area. if we had decided to optimize for no overshoot, a would equal 7.5, and hence the closed loop pole (a ? b / lv) would be 10,000, which is a frequency of 1.592 khz. this would have resulted in a phase margin degradation of 13 at the 367-hz frequency desired. this may or may not be acceptable. one must weigh the servo bandwidth, phase margin degradation, and maximum voltage at the vcm for each individual case. result in the example for the 2081-hz roll-off case with 31% overshoot and proper pole cancellation, the compensation values are: r l =6.2 k w c l = 0.016 m f in the example for the 1592-hz roll-off case with no overshoot and proper pole cancellation, the compensation values are: r l =4.7 k w c l = 0.022 m f the linearity of the transconductance amplifier (around a center value of 500 ma/volt) is shown in figure 2. in this case, the output current sense resistors (r sa and r sb ) were 5% tolerance, 0.5 w . any mismatch between r sa and r sb contribute directly to mismatch between the positive and negative full-scale. including the external resistor mismatch, the overall loop nonlinearity is approximately 1% maximum over a 250-mv input voltage range. figure 2. SI9961 transconductance end point non-linearity f s 50 440 60 ? () = this is a sample frequency of 3667 h f 3db 367 tan 10 () () ? = h to asp + () sx + () ? () = v o a pxp C () + e x C t x ---------------------------------------------- - = v o a = att 0 = v o pl v () b ? = att 0 ?
SI9961 vishay siliconix s-60752rev. f, 05-apr-99 faxback 408-970-5600, request 70014 8 www.siliconix.com figure 3. transconductance amplifier figure 4. figure 5.
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